Low power sigma delta modulator

H - Electricity – 03 – M

Patent

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Details

H03M 1/12 (2006.01) H03H 17/02 (2006.01) H03M 1/06 (2006.01) H03M 3/02 (2006.01)

Patent

CA 2547050

A low power analog-to-digital channel includes a decimation filter coupled to a sigma-delta modulator. Various embodiments include a decimation filter including an output and a sigma-delta modulator coupled to the output of the decimation filter, where a clock frequency applied to the decimation filter is approximately a integral multiple of a sampling frequency of the sigma delta modulator. In an embodiment, the sigma-delta modulator includes one or more successive approximation converters. In an embodiment, the sigma delta modulator includes one or more area efficient integrators.

Un canal analogique-numérique de faible puissance comprend un filtre de décimation couplé à un modulateur sigma-delta. Divers modes de réalisation comprennent un filtre de décimation, y compris une sortie et un modulateur sigma-delta couplé à la sortie du filtre de décimation, où une fréquence d'horloge appliquée au filtre de décimation représente environ un multiple entier d'une fréquence d'échantillonnage du modulateur sigma-delta. Dans un mode de réalisation, le modulateur sigma-delta comprend un ou plusieurs convertisseurs par approximations successives. Dans un mode de réalisation, le modulateur sigma-delta comprend un ou plusieurs intégrateurs de surface de captation efficace.

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