Low-power, stand by mode computer

Details Low-power, stand by mode computer Low-power, stand by mode computer

G - Physics

06

F

354/230.82

G06F 1/32 (2006.01) G06F 9/00 (2006.01) G06F 9/46 (2006.01)

Patent

CA 2018658

34 ABSTRACT OF THE DISCLOSURE A method and apparatus for configuring a computer in a low-power mode are provided. In the low-power mode, dynamic random access memory is refreshed by a battery powered system in order to maintain the memory contents. Low-power mode is entered by saving an interrupt mask and by disabling interrrupts, followed by saving the DMA status, finishing DNA operations, and disabling DMA. After these steps, the I/O state of the machine is saved by saving various I/O registers and ports. A referesh of the memory is forced before the system refresh operations are discontinued.

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