Lsi semiconductor device and fabrication thereof

Details Lsi semiconductor device and fabrication thereof Lsi semiconductor device and fabrication thereof

H - Electricity

01

L

356/12, 356/134

H01L 27/10 (2006.01) H01L 23/528 (2006.01) H01L 27/118 (2006.01)

Patent

CA 1120606

ABSTRACT Disclosed is an improved masterslice design tech- nique including structure, wiring, and method of fabricating, to provide improved Large Scale Inte- grated Devices. In accordance with the improved masterslice tech- nique a plurality of semiconductor chips are pro- vided wherein essentially the entire semiconductor surface area of each chip is utilized to provide cells selectable to be personalized (wired). None of the semiconductor surface area is dedicated for wiring channels. The individual cell area and cell configuration is optimally arrived at to facilitate wiring the maximum number, if not all of the cells contained on each chip, whereby circuit density is materially improved and a wide variety LSI device part numbers may be readily fabricated.

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