Main memory control system

Details Main memory control system Main memory control system

G - Physics

06

F

354/230.86

G06F 9/30 (2006.01) G06F 9/00 (2006.01) G11C 11/406 (2006.01) G11C 11/4072 (2006.01)

Patent

CA 2024433

ABSTRACT OF THE DISCLOSURE A main memory control system has an initial data generating circuit for generating initial data, an initialization control circuit for activating an initialize signal in response to an initialize command, and a refresh control circuit that generates refresh addresses. When the initialize signal is inactive, the main memory control system performs normal read, write, and refresh operations. When the initialize signal is active, the main memory control system selects the initial data by means of a data multiplexer and performs only write operations, writing the initial data at refresh addresses generated by the refresh control circuit. If the main memory has an interleaved structure, the initial data are written in all leaves simultaneously.

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