G - Physics – 06 – F
Patent
G - Physics
06
F
354/224
G06F 11/00 (2006.01) G06F 11/07 (2006.01)
Patent
CA 1219375
MAIN STORAGE FAILURE ADDRESS CONTROL SYSTEM IN A DATA PROCESSING SYSTEM ABSTRACT OF THE DISCLOSURE Disclosed is a main storage failure address control system in a data processing system which comprises a plurality of main storage units including a hardware prefix area, a main storage control unit, a plurality of data processing units, and at least one data transfer apparatus, in which when a failure occurs at the read or write operation in the main storage unit, the failed main storage address is held in the failed main storage address register, and the address is then stored in the hardware prefix area; wherein the failed main storage address register is located in the main storage control unit. In this system, the circuit constitution for reading the failed main storage address during access to the main storage unit and for storing the address into the hardware prefix area is simplified. Thus, increasing the efficiency of the processing of the system.
468152
Nishida Hidehiko
Tanaka Tsutomu
Fujitsu Limited
Mcfadden Fincham
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