Management of defective blocks in flash memories

Details Management of defective blocks in flash memories Management of defective blocks in flash memories

G - Physics

11

C

G11C 29/00 (2006.01)

Patent

CA 2536994

The invention relates to a method for the management of defective memory blocks in a non-volatile memory system comprising individually erasable memory blocks (SB) that can be addressed with the aid of real memory block addresses (SBA). Said memory blocks can be addressed by means of an address conversion that uses an allocator table (ZT) to convert logical block addresses (LBA) into one of the respective memory block addresses (SBA). According to the invention, the allocator table (ZT) is sub-divided into at least one useful data area (NB), a buffer block area (BB), a defect area (DB) and a reserve area (RB). If an error occurs during the erasure process, the relevant block is replaced by a reserve block and its memory block address is written to the defect area (DB).

L'invention concerne un procédé de gestion de blocs mémoire défectueux dans un système à mémoire non volatile, comprenant des blocs mémoire (SB) effaçables individuellement, adressables au moyen d'adresses de blocs mémoire réelles (SBA), lesdits blocs mémoire étant adressables au moyen d'une conversion d'adresse utilisant une table d'affectation (ZT) pour convertir des adresses de blocs logiques (LBA) en l'une des adresses de blocs mémoire réelles respectives (SBA). La table d'affectation (ZT) est subdivisée en au moins une zone de données utiles (NB), une zone à bloc tampon (BB), une zone de défauts (DB) et une zone de réserve (RB). L'invention est caractérisée en ce que, lorsqu'une erreur se produit lors de l'effaçage, le bloc correspondant est remplacé par un bloc de réserve et son adresse de bloc mémoire est introduite dans la zone de défauts (DB).

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