Manufacturing ccds in a conventional cmos process

Details Manufacturing ccds in a conventional cmos process Manufacturing ccds in a conventional cmos process

H - Electricity

01

L

H01L 21/00 (2006.01) H01L 21/339 (2006.01)

Patent

CA 2603678

A technique for forming Charge-Coupled Devices (CCDs) in a conventional Complementary Metal Oxide Semiconductor (CMOS) process. A number of single- layer polysilicon gates are formed on an as-grown, native doped silicon substrate, with gaps between them. Masking is used to selectively dope the gates while preventing doping of the silicon in the gaps. Masking may likewise be used to selectively silicide the gates while preventing suicide formation in the gaps. Conventional source-drain processing produces input/output diffusions for the CCD.

La présente invention concerne un procédé de réalisation de CCD (Charge-Coupled Device) en technologie CMOS (Complementary Metal Oxide Semiconductor). En l'occurrence, on prend un substrat de silicium natif dopé, tel qu'après croissance, et on y réalise des portes de silicium polycristallin mono-couche, séparées les unes des autres par des intervalles. Par masquage, on dope sélectivement les portes tout en évitant d'affecter le silicium des intervalles. On procède également par masquage pour la siliciuration des portes, tout en évitant la formation de siliciure dans les intervalles. Un traitement source-drain conventionnel suffit à la production des diffusions d'entrées/sorties pour le CCD.

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