Mask programmable read-only memory stacked above a...

G - Physics – 11 – C

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G11C 17/00 (2006.01) G11C 17/06 (2006.01) G11C 17/08 (2006.01) H01L 27/102 (2006.01)

Patent

CA 1184300

-36- ABSTRACT OF THE DISCLOSURE MASK PROGRAMMABLE READ-ONLY MEMORY STACKED ABOVE A SEMICONDUCTOR SUBSTRATE In the disclosed read-only memory, address decode means for addressing information in the memory lie in a semiconductor substrate; an insulating layer covers the address decode means; an array of spaced-apart metal lines and semiconductor lines lies on the insulating layer over the address decode means; outputs from the address decode means respectively couple through the insulating layer to the metal lines and to the semiconductor lines; and a plurality of mask selectable electrical contacts between the metal lines and semiconductor lines forms a matrix of mask selectable diodes over the insulating layer representative of the information in the memory.

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