Mask size adjustment to compensate for semiconductor...

Details Mask size adjustment to compensate for semiconductor... Mask size adjustment to compensate for semiconductor...

H - Electricity

01

L

356/142

H01L 21/34 (2006.01) G03F 7/20 (2006.01) H01L 21/027 (2006.01)

Patent

CA 1118910

ABSTRACT A method of manufacturing a microminiature solid-state device including first and second steps of exposing radiation-sen- sitive material at a first major surface of the devices substrate to a radiation-pattern from a mask so as to define locations at the surface for localised processing. At least one processing steps, between the first and second exposure steps, results in dimensional distortion of t?? area of the substrate. To reduce the effect of this dimensional distortion on the relative locations defined by the first and second exposure steps. the relative sizes of the area of the substrate surface and the area of the mask are adjusted substantially uniformly. This adjustment of the relative sizes of the areas of the substrate surface and mask can be ac- complished by maintaining either one, or both. the mask and sub- strate at a different temperature during different exposure steps.

302578

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