G - Physics – 06 – F
Patent
G - Physics
06
F
G06F 13/36 (2006.01)
Patent
CA 2575724
The bus circuit (500) of a master electronics card (112A) in a backplane~based communications system (100) adaptively grants the upstream bus to the slave electronics cards (112B) by the early termination of a scheduled number of grants to a slave electronics card (112B) when the bus circuit (500) on the master electronics card (112A) detects idle cells.
L'invention concerne un circuit de bus (500) de carte électronique maîtresse (112A) de système de communications en fond de panier (100) qui octroie de façon adaptable le bus amont aux cartes électroniques esclaves (112B) par la termaison anticipée d'un nombre programmé d'octrois à une carte électronique esclave (112B) lorsque le circuit de bus (500) de la carte électronique maîtresse (112A) détecte des cellules inactives.
Huang Shuo
Leroy Christophe Pierre
Othman Amar Mohammed
Ripy Paul Brian
Barrigar Intellectual Property Law
Tellabs Petaluma Inc.
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