Master slave buffer circuit

H - Electricity – 03 – K

Patent

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328/203

H03K 19/086 (2006.01) G05F 3/22 (2006.01)

Patent

CA 1301262

ABSTRACT OF THE DISCLOSURE A circuit for providing a voltage reference level using a master circuit and a plurality of slave circuits. The master circuit includes a Vbb reference circuit, a temperature compensation and Vcse reference circuit, and a voltage step-up and buffering circuit. Each of the slave circuits has a pair of transistors in an emitter-follower configuration to step down the voltage and drive the circuitry requiring the voltage reference.

596422

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