Maximum likelihood decoder and decoding method

Details Maximum likelihood decoder and decoding method Maximum likelihood decoder and decoding method

H - Electricity

03

M

H03M 7/00 (2006.01) H03M 13/41 (2006.01)

Patent

CA 2142762

A signal vector sequence corresponding to one block which is inputted in continuous n symbol sections is held in a vector sequence holding portion 11. A virtual information generating portion 12 and a coding portion 13 successively generate, with respect to N paths which can exist in the one block, corresponding virtual code vector sequences. A metric operating portion 14 inputs the signal vector sequence held in the vector sequence holding portion 11 and each of the virtual code vector sequences applied from the coding portion 13 to operate respective metrics of the N paths. A metric comparing portion 16 and a metric holding portion 15 judge a maximum likelihood path having the minimum metric on the basis of the respective metrics operated by the metric operating portion 14. When processing of the N paths is terminated, an information holding portion 17 acquires from the virtual information generating portion 12 information before the coding on the virtual code vector sequence corresponding to the maximum likelihood path and outputs the information as the result of the decoding. In operating the respective metrics of the N paths which can exist in one block, the metric operating portion 14 finds a metric value in a state where the terms of the square of the magnitude of a signal vector are previously subtracted from each of operation expressions. Consequently, the operation processing is simplified, and the circuit arrangement is simplified.

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