Media error code generation as for a video inverse transport...

Details Media error code generation as for a video inverse transport... Media error code generation as for a video inverse transport...

H - Electricity

04

L

H04L 12/56 (2006.01) H04N 7/015 (2006.01) H04N 7/26 (2006.01) H04N 7/64 (2006.01) H04N 5/00 (2006.01) H04N 5/44 (2006.01)

Patent

CA 2145900

In an inverse transport processor of the type which directs video payloads of a packet signal to buffer memory space, apparatus is included for writing a media error codes at sequential first memory address locations in the memory ahead of each packet payload. Concurrently a processor examines the current packet to determine if it occurs in proper sequence. If a packet is lost, the payload is written to memory in subsequent sequential address locations. If there is no packet loss, the sequential first memory address locations are simply overwritten by the packet payload to excise the undesired media error code. Media error codes can thus be inserted in the packet payload stream without creating timing obstacles, for a system designer.

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