Memory access controller

G - Physics – 06 – F

Patent

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354/233

G06F 15/16 (2006.01) G06F 13/18 (2006.01)

Patent

CA 1296808

27598-38 Abstract of the Disclosure Disclosed is a memory access controller for transferring any information from one processing unit among a plurality of processing units to another processing unit. The memory access controller for enabling any two processing units to effect trans- mission and reception therebetween simply and with a reduced time limitation at a high speed, includes memory for common use in a plurality of the processing units; circuitry for setting a perio- dical access time interval of a predetermined length during which write and read operations in and from said memory can be effected, and for setting an access period of a predetermined length; a selection device for successively selecting those processing units one at a time on the basis of a predetermined selection reference when the processing unit issues d write or read request; and circuitry for permitting the memory access controller to inform the processing unit of being in execution of the request from the processing unit.

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