Memory access method and apparatus in multiple processor...

Details Memory access method and apparatus in multiple processor... Memory access method and apparatus in multiple processor...

G - Physics

06

F

354/233, 354/237

G06F 12/08 (2006.01) G06F 13/16 (2006.01)

Patent

CA 1223973

ABSTRACT A multiprocessor data processing system in which a number of independent processors can concurrently operate on a shared memory even when one processor is performing a read-modify-write (RMW) operation, the system having a locking, content-associative write buffer and a controller for identifying RMW requests, for addressing the buffer and, for issuing directives to lock the buffer, to validate particular data blocks in the buffer and to transfer data back and forth between the processors, the memory and the buffer.

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