Memory access modes for a video display generator

Details Memory access modes for a video display generator Memory access modes for a video display generator

G - Physics

09

G

354/237, 354/236

G09G 1/16 (2006.01) G09G 5/02 (2006.01) G09G 5/39 (2006.01)

Patent

CA 1253258

ABSTRACT OF THE INVENTION A display memory which stores information to be displayed on a raster scan CRT comprises a first storage element for storing dot information, a second storage element for storing behavior information, and a third storage element for storing characteristic information. The first, second, and third storage element are each arranged in an nxm plane where m is an addressable location and each addressable location within each plane has n bits of information. Further, each of the first, second, and third storage elements has address terminals each operatively connected to a display address bus adapted to receive address information from a CPU. Control logic receives address signals, data signals, and control signals from the CPU. The control logic generates enable control signals to selectively enable access to predetermined combinations of said first, second, and third storage elements in response to the address, data, and control signals from the CPU.

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