Memory addressing system

Details Memory addressing system Memory addressing system

G - Physics

06

F

354/239

G06F 9/00 (2006.01) G06F 12/10 (2006.01)

Patent

CA 1183962

A MEMORY ADDRESSING SYSTEM Abstract An improved virtual address system wherein all addresses, real and virtual, are forwarded to an address translator. If the address is real, the results of the translation are not used. If the address is virtual, translation to a real address takes place and the real address is made available to the memory system. Con- tinuous comparison and translation, where called for, increases the speed at which the computing system incor- porating this address translator operates.

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