Memory card resident diagnostic testing

Details Memory card resident diagnostic testing Memory card resident diagnostic testing

G - Physics

06

F

354/225

G06F 11/00 (2006.01) G11C 29/28 (2006.01)

Patent

CA 2030939

A data processing network includes multiple processing devices, multiple memory cards of main storage, and a main storage interface shared by the processors and memory cards. Each of the memory cards includes memory arrays, a hold register for retaining a data pattern stored to the arrays, a compare register and logic circuitry. For a memory array diagnostic test, one of the processing devices sends a compare command (including address information) and the data pattern to one of the memory cards. In response, the logic circuitry on the selected memory card stores the data pattern to its hold register and writes the data pattern into its memory arrays, then reads the data out of the memory arrays into its compare register. The contents of the compare and hold registers are compared, and an error indication provided to the processing device in the event that these registers' contents are not the same.

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