G - Physics
11
C
352/82.1
G11C 11/40 (2006.01) G11C 11/39 (2006.01) G11C 11/411 (2006.01) H03K 3/352 (2006.01)
Patent
CA 1114502
ABSTRACT OF THE DISCLOSURE A memory circuit comprising a memory cell for storing information, constituted of semiconductor circuit elements and the associated circuit elements, and a control input section provided on the input side of the memory cell for controlling the memory cell, constituted of transistor means and current control means, wherein one of ON and OFF states is selected and also held in accordance with more than two logic input signals supplied to the control input section and no power is consumed to hold the OFF state.
318288
Ohhinata Ichiro
Ohkoshi Seiei
Suzuki Hideo
Gowling Lafleur Henderson Llp
Hitachi Ltd.
Nippon Telegraph And Telephone Public Corporation
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