G - Physics – 09 – G
Patent
G - Physics
09
G
375/22
G09G 1/00 (2006.01) G09G 5/393 (2006.01)
Patent
CA 1240427
Abstract of the Disclosure A memory control apparatus for a CRT controller is disclosed. When the same data from a data input circuit is loaded into a plurality of addresses of a buffer memory for storing drawing data, the address of the buffer memory is automatically updated. X- and Y- address generators update address data in response to pulses from X- and Y-axis pulse generators. A micropro- cessor supplies to a register the width of the X and Y thickness of an address to be updated, coordinate data representing a write start point to the address generators, and the drawing data to be written to a data input circuit. The memory can then be updated in units specified by the X and Y thickness of the picture element.
477432
Sakamoto Tsutomu
Takashima Shigekazu
Kabushiki Kaisha Toshiba
Ridout & Maybee Llp
LandOfFree
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