Memory diagnostic arrangement

Details Memory diagnostic arrangement Memory diagnostic arrangement

G - Physics

11

C

354/222, 354/237

G11C 29/00 (2006.01) G06F 11/16 (2006.01) G06F 11/267 (2006.01)

Patent

CA 1059239

MEMORY DIAGNOSTIC ARRANGEMENT Abstract of the Disclosure A diagnostic system is disclosed for detecting mal- functions in the access circuitry utilized to control the read- ing, writing, and refreshing of a plurality of semiconductor memory modules. More specifically, a pair of access circuits are provided for each module with each access circuit only con- trolling the accessing of predetermined bits of each word stored in that module. During read, write and refresh operations, the output signals generated by each of the two access circuits for application to the memory elements in that module are "compared" to ensure that the memory elements are being properly accessed. Moreover, even when one memory module is accessed, the output signals of each pair of access circuits in each of the other nonaccessed modules are "compared" to ensure their continued operability.

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