Memory output circuit

Details Memory output circuit Memory output circuit

G - Physics

11

C

354/237, 352/82.

G11C 11/40 (2006.01) G11C 11/412 (2006.01) G11C 11/417 (2006.01)

Patent

CA 1049655

Abstract of the Invention A unique memory output integrated circuit is disclosed including a memory output driver having an output terminal at which data may be read, a gated power amplifier, and a single ended multiplexer stage which, in the preferred embodiment, is adapted to be interfaced with a random access memory array comprised of a plurality of discrete, non-symmentrical memory cells. The integrated circuit is designed so that the space consumed thereby and the corresponding cost of production can be minimized.

235948

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