G - Physics
11
C
352/41, 352/82.2
G11C 11/24 (2006.01) G11C 5/14 (2006.01) G11C 11/40 (2006.01) G11C 11/406 (2006.01) G11C 11/4072 (2006.01) G11C 11/4074 (2006.01)
Patent
CA 1222050
- 1 - Abstract: A semiconductor memory including a dynamic memory device has a battery for supplying a voltage source for power and a substrate bias voltage when the memory is cut off from an external supply. A refresh control circuit changes the refresh timing of the memory device in accordance with the leakage current of the memory device. The power consumption of the memory can thus be reduced and the data kept for an extended period without an external source of power.
455996
Kubo Masaharu
Masuhara Toshiaki
Minato Osamu
Miyauchi Katsuki
Shimohigashi Katsuhiro
Hitachi Ltd.
Kirby Eades Gale Baker
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