Memory system

G - Physics – 06 – F

Patent

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G06F 12/02 (2006.01) G03F 9/00 (2006.01) G06F 3/033 (2006.01) G09G 5/00 (2006.01) G09G 5/20 (2006.01)

Patent

CA 2090862

2090862 9204673 PCTABS00011 Memory technologies for storing include RAMS and CCDs. Adaptive memory capability and memory servo capability improve memory characteristics. In a RAM embodiment, a detector (220B, 220A) is used to detect a memory address condition (217) and to control the memory (222) and the memory address register (218) in response thereto. In a CCD embodiment, a detector (220A, 220B) is used to detect a memory reference signal (217) and to refresh the memory signals (221A, 221B, 221) in response thereto. Improved memory refresh, memory performance, and memory capacity enhance system characteristics. Improved memory architecture provides advantages of increased speed, lower cost, and efficiency of implementation. Information stored in memory can be scanned out at a rate greater than the addressing rate associated with the memories. This permits higher speed operation with lower cost memories. Use of an output buffer, such as a FIFO, permits normalization of memory clock rates.

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