Message oriented interrupt mechanism for multiprocessor systems

Details Message oriented interrupt mechanism for multiprocessor systems Message oriented interrupt mechanism for multiprocessor systems

G - Physics

06

F

354/230.82

G06F 9/46 (2006.01) G06F 13/26 (2006.01) G06F 15/16 (2006.01)

Patent

CA 1213374

Abstract of the Disclosure An interrupt mechanism for digital computer systems has a message-oriented format which requires no additional lines for implementation beyond those normally provided for transmission of data and control signals between devices. The interrupt may be directed to any number of devices, and at any number of priority levels; the first device available at the appropriate priority level will service the interrupt. The operation of the interrupt mechanism is location-independent; accordingly, the system may be configured, and dynamically reconfigured, free of constrictions imposed by the interrupt mechanism.

463722

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