Metal-insulator-semiconductor device manufacture

Details Metal-insulator-semiconductor device manufacture Metal-insulator-semiconductor device manufacture

H - Electricity

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356/128

H01L 21/20 (2006.01) H01L 21/033 (2006.01) H01L 21/336 (2006.01) H01L 29/778 (2006.01)

Patent

CA 1120605

METAL-INSULATOR-SEMICONDUCTOR DEVICE MANUFACTURE ABSTRACT A method of making a metal-oxide-semiconductor device is disclosed. A thin silicon dioxide insulating layer is formed on the surface of a planar silicon wafer. A first layer of intrinsic polycrystalline silicon is deposited over the dioxide layer, and a second layer of doped polycrystalline silicon is deposited over the intrinsic layer, thereby forming the gate. Subsequent hot processing steps result in diffusion of a portion of the dopant from the doped polycrystalline layer into and throughout the in- trinsic layer so as to dope the latter. A metal contact layer is then deposited onto the gate and in superimposed vertical alignment with respect to the thin silicon dioxide insulating layer. The intrinsic nature of the first polycrystalline layer reduces grain growth and void formation in the polycrystal- line silicon and thereby prevents the silicon dioxide from being attacked by hydrofluoric acid seeping through voids in the polycrystalline layer during subsequent processing. The yield for the manufacture of devices having thin oxide gates is substantially improved. FI 9-77-065

337620

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