Method and apparatus for a digital clock multiplication circuit

Details Method and apparatus for a digital clock multiplication circuit Method and apparatus for a digital clock multiplication circuit

H - Electricity

03

K

H03K 3/315 (2006.01) G06F 7/68 (2006.01) H03K 5/156 (2006.01)

Patent

CA 2417021

A clock multiplication technique includes driving two oscillatory circuits by an input signal. One of the circuits has an inverted input. The oscillatory circuits are characterized by a transfer function having an unstable region bounded by two stable regions. Oscillations produced during operation of each of the circuits in the unstable regions are combined to produce a signal whose frequency is a multiple of the input frequency.

L'invention concerne une technique de multiplication des impulsions d'horloge, qui comprend l'excitation de deux circuits oscillants par un signal d'entrée. Un des circuits possède une entrée inversée. Ces circuits oscillants sont caractérisés par une fonction de transfert présentant une région instable bornée par deux régions stables. Les oscillations produites durant le fonctionnement de chacun des circuits dans les régions instables sont combinées afin de produire un signal dont la fréquence est un multiple de la fréquence d'entrée.

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