H - Electricity – 04 – L
Patent
H - Electricity
04
L
H04L 7/02 (2006.01) H04J 3/06 (2006.01) H04L 12/56 (2006.01) H04N 7/62 (2006.01) H04Q 11/04 (2006.01)
Patent
CA 2122111
An adaptive clock recovery arrangement for deriving a synchronous clock from an asynchronous, packet stream such as an asynchronous transfer mode (ATM) cell stream. The deviation in the magnitude of information stored in a first-in-first-out memory is continually monitored, and the synchronous clock frequency, referred to as the adaptive line clock frequency, is adjusted in a plurality of modes, under the control of a processor. The adjustment is made in response to a detected increasing condition of the monitored deviation. The adjustment are open-loop adjustment made without continually adjusting the adaptive line clock frequency based on the monitored deviation. Damping is substantially reduced compared with"conventional" PLL arrangements because the open-loop adjustments result in a rapid frequency correction with perfect or nearly perfect deadbeat damping, i.e.without the frequency oscillations that continue after the correct frequency is reached in closed-loop arrangements.
American Telephone And Telegraph Company
Kirby Eades Gale Baker
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