Method and apparatus for an efficient error detection and...

Details Method and apparatus for an efficient error detection and... Method and apparatus for an efficient error detection and...

H - Electricity

03

M

354/223.1

H03M 13/17 (2006.01)

Patent

CA 1123105

METHOD AND APPARATUS FOR AN EFFICIENT ERROR DETECTION AND CORRECTION SYSTEM BY THOMAS H. HOWELL, ROBERT E. SCRIVER, AND JOSEPH C. CIRCELLO ABSTRACT In an information handling system in which a cyclic code is utilized to both detect and correct errors and a cyclical redundancy code is used for supplementary detection of errors, the cyclical redundancy code (CRC) polynomial is chosen to be a factor of the generator polynomial, g(x), of the error detection and correction (EDAC) code. In this way, the same check bits in the code word used for error detection and correction may be further utilized for a CRC check to supplement the error detection capabilities of the system. The risk of miscorrection of data is reduced to de minimus levels by the partitioning of data and count fields in the course of the development of the error detection and correction codes. Practice of the teachings herein disclosed provides a more efficient error detection and correction system with greatly reduced risk of miscorrection An embodiment of the invention is disclosed following the methodology taught herein. 5202661

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