Method and apparatus for baud timing recovery

Details Method and apparatus for baud timing recovery Method and apparatus for baud timing recovery

H - Electricity

04

L

340/205, 333/26

H04L 7/00 (2006.01) H04L 7/02 (2006.01)

Patent

CA 2025656

METHOD AND APPARATUS FOR BAUD TIMING RECOVERY Abstract A data communications receiver for use in a modem. A fixed sample clock and a dominant tap tracking algorithm lock the local baud timing in the receiver to the baud timing in a remote transmitter. An interpolating filter provides a plurality of discrete delays. A filter control circuit inspects the tap coefficients of an adaptive equalizer to determine the location of and any movement of the dominant tap. The filter control circuit selects the rate of cycling through the discrete delays to compensate for any frequency difference between the local baud timing and the remote baud timing, and to prevent movement of the dominant tap. A baud detector circuit monitors the sample clock and the operating state of the filter control circuit to identify the end of a baud and detects and corrects for any frequency difference between the remote baud timing and the local baud timing by providing one additional sample or one less sample to the adaptive equalizer. A bit clock circuit monitors the operation of the baud detector and adjusts the bit clock frequency to compensate for the additional or discarded sample. 04050-1-0800

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