Method and apparatus for controlling elementary stream data...

Details Method and apparatus for controlling elementary stream data... Method and apparatus for controlling elementary stream data...

H - Electricity

04

N

H04N 7/50 (2006.01) H04L 12/56 (2006.01) H04N 7/52 (2006.01) H04N 7/60 (2006.01)

Patent

CA 2212246

A multimedia terminal having a host processor, an audio and video encoder and a system time clock. The encoders are input as digital video elementary frames into a multiplexer. The multiplexer includes a mux processor, a video FIFO and a video mux logic circuit coupled to both the mux processor and the video FIFO. Mux logic is operative to monitor video FIFO fullness and to signal the mux processor when there is sufficient video data in the FIFO to form the payload of a transport packet.

Terminal multimédia ayant un processeur hôte, un codeur audio et vidéo et une horloge système. Les codeurs sont entrés dans un multiplexeur sous la forme de trames vidéonumériques élémentaires. Le multiplexeur comprend un processeur multiplexeur, une file d'attente (FIFO) vidéo et un circuit logique de multiplexage vidéo couplé à la fois au processeur multiplexeur et à la file d'attente vidéo. La logique de multiplexage permet de contrôler la longueur de la file d'attente vidéo et d'indiquer au processeur multiplexeur quand les données vidéo qu'elle contient sont suffisantes pour former la charge utile d'un paquet à transmettre.

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