Method and apparatus for controlling the phase of a digital...

H - Electricity – 04 – L

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H04L 7/00 (2006.01) H04L 7/027 (2006.01)

Patent

CA 1171499

PHF 80.508 19 ABSTRACT: Method for controlling the phase of a decision circuit clock of a receiving system for digital data, according to which the frequencies above l/T (T = data symbol period) are substantially eliminated, whereafter the phase deviation to be corrected is evaluated and the clock is shifted in accordance with this phase deviation, inclusive of its sign. An example of a circuit for using this method includes a lowpass filter circuit and an evaluation and phase shifting circuit for fixing the opti- mum decision instants of the decision circuit provided at the output of an adaptive filter. This method may be used in receiving systems for digital data which are trans- mitted after linear modulation.

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