Method and apparatus for decoding diphase signals

H - Electricity – 03 – K

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H03K 9/00 (2006.01) H04L 25/49 (2006.01)

Patent

CA 1055847

Abstract of the Disclosure An incoming diphase signal is decoded by an apparatus which includes a circuit for generating a clock control signal derived from the diphase signal and related to the clock which initially generated the diphase signal. A controlled oscillator, the frequency of which is determined by the control signal, advances a counter having a plurality of distinct states. A circuit is included, responsive to selected states of the counter, which serves to decode data information from the diphase signal. The decoding circuit includes a first sampler for sampling the level of the diphase signal during a first preselected counter state and further includes a comparator for comparing the sampled diphase signal level with a subsequent diphase signal level. This apparatus is particularly adapted to carry out the process which includes the steps of locking an oscillator to the clock frequency of the diphase signal and sampling the level of the diphase signal during the first half of each diphase base-bit interval. The process further includes the steps of comparing the sampled base-bit level with the level of the diphase signal during the last half of the same diphase base bit interval and storing the comparison level.

249076

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