Method and apparatus for depositing bits in a register

Details Method and apparatus for depositing bits in a register Method and apparatus for depositing bits in a register

G - Physics

06

F

354/230.71

G06F 9/30 (2006.01) G06F 9/308 (2006.01)

Patent

CA 1270571

Abstract A method and apparatus are presented for depositing bits in a destination register in accordance with various embodiments of the present invention. Bits within an instruction register specify to an arithmetic logic unit (ALU) a bit source, a number of bits, and a location within the destination register. The ALU within a single instruction cycle time transfers bits from the bit source to the location within the destination register. The source of bits may be another register or an immediate field within the instruction register.

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