Method and apparatus for digital signal processing and...

G - Physics – 06 – F

Patent

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Details

G06F 9/445 (2006.01) G06F 15/78 (2006.01) H04N 5/44 (2006.01) H04N 5/00 (2006.01)

Patent

CA 2360550

Elements necessary for a digital television receiver are structured as blocks that are a plurality of digital signal processing blocks and a host arithmetic operation processing block. The blocks are connected through a general-purpose bus. Commands for controlling operations of the blocks and data of streams are transferred through the bus. An extension plug-in card for a new service can be attached and detached to / from the bus. The extension plug-in card has hardware that accomplishes an extension function and a script for commands of the hardware. When the extension plug-in card is attached to the bus through an interface, the script for the commands is automatically uploaded to the host arithmetic operation processing block side. The host arithmetic operation processing block can operate the extension plug-in card corresponding to the transferred script for the commands.

Les éléments nécessaires à un récepteur de télévision numérique sont divisés en plusieurs blocs processeurs de signaux numériques et en un bloc microprocesseur central. Ces blocs sont connectés par des bus généraux, par lesquels les instructions et les flux de données sont transférés pour permettre de commander les opérations de ces blocs. Des cartes d'extension enfichables, détachables des bus, sont fournies pour des services potentiels nouveaux. Ces cartes d'extension enfichables contiennent du matériel pour l'exécution des fonctions étendues et des scripts d'instructions de mémoire pour le matériel. Lorsqu'une carte d'extension enfichable est connectée à un bus via une interface, les scripts d'instructions sont téléchargés dans le bloc microprocesseur central qui, à son tour, exploite la carte d'extension enfichable sur la base des scripts d'instructions ainsi reçus.

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