Method and apparatus for eliminating clock jitter in...

H - Electricity – 03 – M

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H03M 1/34 (2006.01) H03M 3/02 (2006.01)

Patent

CA 2354623

An inventive high-resolution Delta-Sigma analog-to-digital converter (15) using a Continuous-Time implementation having suppressed sensitivity to clock jitter. The inventive method and apparatus suppresses the sensitivity to jitter by the square of the oversampling ratio when compared to current Continuous-Time implementations of Delta-Sigma modulators. The present invention preferably includes a digital-to-analog converter (17) that ensures that the integral of an output voltage is constant over a clock duty cycle regardless of clock jitter. The digital-to-analog converter (17) preferably includes at least two switches and a capacitor (28).

L'invention concerne un convertisseur (15) analogique-numérique delta-sigma haute résolution à mise en oeuvre continue dans le temps continu, permettant de supprimer la sensibilité à la gigue d'horloge. Le procédé et l'appareil selon l'invention permettent de supprimer la sensibilité à la gigue d'une valeur égale au carré du taux de suréchantillonnage par rapport aux mises en oeuvre à temps continu des modulateurs delta-sigma. La présente invention porte également, de préférence, sur un convertisseur (17) numérique-analogique qui permet de garantir la constance de l'intégrale d'une tension de sortie au cours d'un cycle d'horloge, indépendamment de la gigue d'horloge. Ce convertisseur (17) numérique-analogique comprend, de préférence, au moins deux commutateurs et un condensateur (28).

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