Method and apparatus for establishing priority between...

H - Electricity – 04 – L

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340/84

H04L 5/14 (2006.01) G06F 13/374 (2006.01)

Patent

CA 1194575

DATA INDICATION SYSTEM Abstract of the Disclosure A system for controlling the flow of data over a common bus between a plurality of processing units is disclosed which preferably includes a MOS/LSI circuit controller chip associated with each processing unit for awarding priority of access to the common bus when two or more processing units attempt to simultaneously gain access to the common bus. A contention circuit located in each controller chip is responsive to the sensing of each bit in the address of its associated processing unit, and generates a plurality of transitions on the common bus during the time a binary one bit is sensed in the address and listens for the presence of any trans- ition on the common bus during the time a binary zero is sensed in the address. Access to the common bus is lost when transitions are detected on the bus during the time a binary zero bit is sensed and acquired when no trans- itions have been detected at the completion of the sensing of the address of the requesting processing unit.

409957

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