Method and apparatus for filtering invalidate requests

Details Method and apparatus for filtering invalidate requests Method and apparatus for filtering invalidate requests

G - Physics

06

F

354/238

G06F 12/08 (2006.01) G06F 13/20 (2006.01) G06F 15/16 (2006.01)

Patent

CA 1324221

METHOD AND APPARATUS FOR FILTERING INVALIDATE REQUESTS ABSTRACT A method and apparatus which filter the number of invalidates to be propagated onto a private processor bus are provided. This is desirable so that the processor bus is not overloaded with invalidate requests. The present invention describes a method of filtering the number of invalidates to be propagated to each processor. A memory interface filters the invalidates by using a second private bus, the invalidate bus, which communicates with the cache controller. The cache controller can tell the memory interface whether data corresponding to the address on the invalidate bus is resident in the private cache memory of that processor. In this way, the memory interface only has to request the private processor bus when necessary, in order to perform the invalidate.

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