H - Electricity – 04 – J
Patent
H - Electricity
04
J
H04J 3/16 (2006.01)
Patent
CA 2447219
A method and apparatus for an overhead processing system is described. More particularly, frame latency is used to process less time-critical overhead with the overhead processing system. Such a system uses less semiconductor wafer area and consumes less power than processing all overhead in a time- critical manner using flip-flops and the like.
L'invention concerne un procédé et un dispositif destinés à un système de traitement de surdébit. L'invention concerne plus précisément l'utilisation du temps d'attente de trame pour traiter le surdébit à durée critique moindre avec le système de traitement de surdébit. Ce système utilise moins de surface de plaquette semi-conductrice et consomme moins d'énergie que pour le traitement de la totalité du surdébit en mode à durée critique à l'aide de bascules bistables et d'éléments analogues.
Tsuji Barry Kazuto
Varelas Oreste Basil
Deeth Williams Wall Llp
Intel Corporation
West Bay Semiconductor Inc.
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