Method and apparatus for independently resetting processors...

G - Physics – 06 – F

Patent

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354/230.72

G06F 9/22 (2006.01) G06F 1/24 (2006.01) G06F 9/30 (2006.01) G06F 15/177 (2006.01)

Patent

CA 2027799

ABSTRACT A method and system for independently resetting primary and secondary processors 20 and 120 respectively under program control in a multiprocessor, cache memory system. Processors 20 and 120 are reset without causing cache memory controllers 24 and 124 to reset.

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