H - Electricity – 03 – K
Patent
H - Electricity
03
K
H03K 5/135 (2006.01)
Patent
CA 2596258
A delay locked loop includes initialization circuitry that ensures that a DLL is initialized to an operating point that is not to close to either end of a delay vs. control voltage characteristic. The initialization circuitry forces the DLL to initially search for a lock point starting from an initial delay, the delay is varied in one direction, forcing the DLL to skip the first lock point. The initialization circuitry only allows the DLL to vary the delay of the voltage controlled delay loop in the one direction from the initial delay until the operating point is reached.
La présente invention concerne une boucle à retard de phase comprenant un circuit d'initialisation qui garantit que la boucle DLL est initialisé à un point de mise en oeuvre qui ne soit pas susceptible de se fermer à l'une ou l'autre des extrémités d'une caractéristique de tension de commande par opposition au retard. Le circuit d'initialisation oblige la DLL à rechercher initialement un point de verrouillage partant d'un retard initial, le retard variant dans un sens, ce qui force la DLL à sauter le premier point de verrouillage. Le circuit d'initialisation ne permet à la DLL que de faire varier le retard de la boucle retard commandée en entions dans le même sens en partant du retard initial jusqu'à atteindre le point de mise en oeuvre.
Haerle Dieter
Mai Tony
Vlasenko Peter
Hammond Daniel
Mosaid Technologies Incorporated
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