Method and apparatus for minimizing differential power...

Details Method and apparatus for minimizing differential power... Method and apparatus for minimizing differential power...

G - Physics

06

F

G06F 9/30 (2006.01) G06F 9/318 (2006.01) G06F 9/40 (2006.01) G06F 21/00 (2006.01)

Patent

CA 2258338

A method of masking a conditional jump operation in a cryptographic processor, wherein program execution jumps to one of two branches dependent on a first or second condition of a distinguishing value V relative to a reference wherein the reference is bounded by an upper limit Vmax and a lower limit Vmin. The method comprising the steps of determining the location of a conditional jump and inserting code thereat for executing instructions to change program execution to a respective one of the two branches by using said distinguishing value and a base address to compute a target address, wherein for each evaluation of said condition a different number of instructions are executed, thereby minimizing the effectiveness of a differential power attack.

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