G - Physics – 06 – F
Patent
G - Physics
06
F
354/133, 354/149
G06F 12/10 (2006.01)
Patent
CA 1313269
- 40 - A METHOD AND APPARATUS FOR PREDICTING VALID PERFORMANCE OF VIRTUAL-ADDRESS TO PHYSICAL-ADDRESS TANSLATIONS Abstract A prediction logic device operating in conjunction with a vector processor to predict, before the completion of the translation of the virtual addresses of all of the data elements of a vector, the valid performace of all virtual-address to physical-address translations for the data elements of the vector. The prediction logic device asserts an MMOK signal to a scalar processor when it becomes known that no memory management fault and/or translation buffer miss will occur such that the scalar processor can resume vector instruction issue to the vector processor at the earliest possible time.
599270
Fenwick David M.
Stanley Timothy J.
Williams Douglas D.
Digital Equipment Corporation
Fenwick David M.
Smart & Biggar
Stanley Timothy J.
Williams Douglas D.
LandOfFree
Method and apparatus for predicting valid performance of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for predicting valid performance of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for predicting valid performance of... will most certainly appreciate the feedback.
Profile ID: LFCA-PAI-O-1197816