Method and apparatus for randomized cache entry replacement

G - Physics – 06 – F

Patent

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G06F 12/12 (2006.01) H04L 12/56 (2006.01)

Patent

CA 2494046

A cache controller (300) includes potential replacement list (320), each entry of the list containing an aging counter (335) and a pointer (325) indicating an entry in a cache (302) that may potentially be replaced. When a hit in the list, the pointer is taken out of the list and replaced by a new random pointer from a random value generator (360). In the same manner upon a cache miss, the least recently used pointer (325) determined by the aging counters (335) is used for replacing an entry in the cache (302) and is replaced itself by a random value.

L'invention concerne une unité de commande d'antémémoire (300). Cette unité de commande d'antémémoire (300) comprend une liste de remplacement potentiel (320), une pluralité de bits valides (330(1)-(N)) et un certain nombre de compteurs (335(1)-(N)). La liste de remplacement potentiel (320) comporte un certain nombre d'entrées (325(1)-(N)). Chacun des bits valides (330(1)-(N)) correspond à une des entrées (325(1)-(N)). Chaque compteur (1)-(N)) correspond également à une des entrées (325(1)-(N)).

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