Method and apparatus for rearranging codeword sequence in a...

H - Electricity – 04 – L

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H04L 27/00 (2006.01) H04L 1/00 (2006.01) H04L 27/18 (2006.01) H04L 27/34 (2006.01)

Patent

CA 2418471

Disclosed is provided a method and apparatus for mapping a stream of bits output from an encoder to a stream of bits for 2m-ary modulation. The method and apparatus divides the stream of bits from the encoder into a first period and a second period. The first period includes bits with higher priority in the stream of the bits output from the encoder, and the second period includes bits with lower priority. The method and apparatus maps the bits existing in the first period to bit positions with higher reliability in a stream of m bits representing each of the bits for 2m-ary modulation, and maps the bits existing in the second period to bit positions with lower reliability in the stream of m bits.

Cette invention concerne un procédé et un appareil servant à indexer un train de bits produit par un codeur à un train de bits pour une modulation secondaire m. Ce procédé et cet appareil divisent le train de bits du codeur en une première période et une seconde période. La première période comprend des bits dont la priorité est supérieure dans le train de bits produit par le codeur, et la seconde période comprend des bits à priorité inférieure. Selon le procédé et l'appareil, les bits de la première période sont indexés à des positions de bits à fiabilité supérieure dans un train de m bits représentant chacun des bits pour une modulation secondaire m, et les bits de la seconde période sont indexés à des positions de bits à fiabilité inférieure dans le train de m bits.

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