H - Electricity – 03 – F
Patent
H - Electricity
03
F
H03F 1/32 (2006.01)
Patent
CA 2327887
The present invention provides a biasing method and apparatus which provides bias circuits of radio frequency (RF) power transistors with a low reactive impedance at low frequencies to reduce hysteresis related distortion without affecting the transistor input or output impedance or any impedance matching network which may be used. In one embodiment, the invention is incorporated in a lateral diffused metal-oxide semiconductor (LDMOS) transistor to reduce hysteresis brought about by a drain bias circuit without any impact on the transistor output impedance. By removing the effect of the bias circuit at RF frequencies, the bias circuit can be designed with a low reactive impedance at low frequencies without any material consequences on the transistor output impedance. With a low enough reactive impedance, the hysteresis introduced by the bias circuit is substantially reduced. An auxiliary bias feed external to an RF transistor package is also embodied.
Grundlingh Johan M.
Ilowski John J.
Leroux Robert
Smiley Russell C.
Millard Allan P.
Nortel Networks Corporation
Nortel Networks Limited
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