Method and apparatus for single-polarity charge sensing for...

Details Method and apparatus for single-polarity charge sensing for... Method and apparatus for single-polarity charge sensing for...

H - Electricity

01

L

H01L 21/06 (2006.01) G01T 1/24 (2006.01) H01L 31/0272 (2006.01) H01L 31/115 (2006.01)

Patent

CA 2615827

A system for improving the resolution of semiconductor based radiation detectors deposited via physical vapor deposition (PVD) techniques (e.g. evaporation or sputtering such as amorphous Selenium, .alpha.-Se, Mercury Iodide, HgI2, Lead Oxide, PbO) which exhibit poor transport properties for either electrons or holes (depending on the type of the detector) due to significant carrier trapping. An additional electrical grid is established within the semiconductor between the top and bottom electrodes. The intermediate grid is biased at an appropriate potential to eliminate the variation in the induced charge on photon interaction depth inside the detector volume. The proposed method improves the resolution and the signal-to-noise ratio of the detector system and enables large-area pixelated array designs. The proposed hybrid readout method also enables the design of low-noise readout electronics in complementary metal-oxide semiconductor (CMOS) technologies for large area applications.

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