G - Physics – 11 – C
Patent
G - Physics
11
C
G11C 29/00 (2006.01) G11C 11/34 (2006.01) G11C 11/56 (2006.01) G11C 27/00 (2006.01)
Patent
CA 2257740
This invention provides column redundancy circuits in a storage array, which circuits are used in a non-volatile memory chip to increase the production yield due to manufacturing defects. The invention includes a scheme to latch and transfer the redundancy information, a redundancy logic circuit, a redundancy column driver, an array architecture with column redundancy, a scheme to program and read the column redundancy memory cells, a scheme to multiplex the fuses, and circuits to use an out-of-bound address as a column redundancy enable/disable signal.
Brennan James Jr.
Tran Hieu Van
Information Storage Devices Inc.
Riches Mckenzie & Herbert Llp
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