Method and apparatus to test address formulation in an...

Details Method and apparatus to test address formulation in an... Method and apparatus to test address formulation in an...

G - Physics

06

F

354/225, 354/243

G06F 11/00 (2006.01) G06F 11/22 (2006.01) G06F 12/10 (2006.01) H03M 13/00 (2006.01) H04L 1/00 (2006.01)

Patent

CA 1104261

ABSTRACT In an advanced large scale data processing system employing partitioning, paging and segmentation techniques with a descriptor enforced access to storage areas, a method and apparatus for testing address formulation is disclosed. All fundamental steps in address preparation are preserved whether a single step formulation is possible, as when the page table words are present in associative memory, or a multiple step process is required, as when the page table words must be retrieved from main memory.

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