Method and arrangement of echo elimination in digital...

Details Method and arrangement of echo elimination in digital... Method and arrangement of echo elimination in digital...

H - Electricity

04

L

H04L 1/00 (2006.01) H04B 3/20 (2006.01) H04B 3/23 (2006.01) H04L 27/38 (2006.01) H04M 3/18 (2006.01)

Patent

CA 2071241

In order to reduce the complexity of an adaptive digital filter used to cancel delayed network echoes, a delay circuit is arranged in series therewith end arranged to compensate for the delay inherent with a speech codec. In the case of a variable delay circuit, the degree by which the echo is delayed is detected in the adaptive digital filter and used to modify the delay time. A gain control arrangement can be provided and used to reduce the gain of the received signal when the near-end party is talking and the adaptive capacity of the adaptive digital filter is exceeded.

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